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# For PCBs designed using KiCad: https://www.kicad.org/
# Format documentation: https://kicad.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.kicad_sch-bak
*-backups
*-cache*
*-bak
*-bak*
*~
~*
_autosave-*
\#auto_saved_files\#
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
~*.lck
\#auto_saved_files#
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses
# Exported BOM files
*.xml
*.csv
# Archived Backups (KiCad 6.0)
**/*-backups/*.zip
# Local project settings
*.kicad_prl

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CERN Open Hardware Licence Version 2 - Strongly Reciprocal
Preamble
CERN has developed this licence to promote collaboration among
hardware designers and to provide a legal tool which supports the
freedom to use, study, modify, share and distribute hardware designs
and products based on those designs. Version 2 of the CERN Open
Hardware Licence comes in three variants: CERN-OHL-P (permissive); and
two reciprocal licences: CERN-OHL-W (weakly reciprocal) and this
licence, CERN-OHL-S (strongly reciprocal).
The CERN-OHL-S is copyright CERN 2020. Anyone is welcome to use it, in
unmodified form only.
Use of this Licence does not imply any endorsement by CERN of any
Licensor or their designs nor does it imply any involvement by CERN in
their development.
1 Definitions
1.1 'Licence' means this CERN-OHL-S.
1.2 'Compatible Licence' means
a) any earlier version of the CERN Open Hardware licence, or
b) any version of the CERN-OHL-S, or
c) any licence which permits You to treat the Source to which
it applies as licensed under CERN-OHL-S provided that on
Conveyance of any such Source, or any associated Product You
treat the Source in question as being licensed under
CERN-OHL-S.
1.3 'Source' means information such as design materials or digital
code which can be applied to Make or test a Product or to
prepare a Product for use, Conveyance or sale, regardless of its
medium or how it is expressed. It may include Notices.
1.4 'Covered Source' means Source that is explicitly made available
under this Licence.
1.5 'Product' means any device, component, work or physical object,
whether in finished or intermediate form, arising from the use,
application or processing of Covered Source.
1.6 'Make' means to create or configure something, whether by
manufacture, assembly, compiling, loading or applying Covered
Source or another Product or otherwise.
1.7 'Available Component' means any part, sub-assembly, library or
code which:
a) is licensed to You as Complete Source under a Compatible
Licence; or
b) is available, at the time a Product or the Source containing
it is first Conveyed, to You and any other prospective
licensees
i) as a physical part with sufficient rights and
information (including any configuration and
programming files and information about its
characteristics and interfaces) to enable it either to
be Made itself, or to be sourced and used to Make the
Product; or
ii) as part of the normal distribution of a tool used to
design or Make the Product.
1.8 'Complete Source' means the set of all Source necessary to Make
a Product, in the preferred form for making modifications,
including necessary installation and interfacing information
both for the Product, and for any included Available Components.
If the format is proprietary, it must also be made available in
a format (if the proprietary tool can create it) which is
viewable with a tool available to potential licensees and
licensed under a licence approved by the Free Software
Foundation or the Open Source Initiative. Complete Source need
not include the Source of any Available Component, provided that
You include in the Complete Source sufficient information to
enable a recipient to Make or source and use the Available
Component to Make the Product.
1.9 'Source Location' means a location where a Licensor has placed
Covered Source, and which that Licensor reasonably believes will
remain easily accessible for at least three years for anyone to
obtain a digital copy.
1.10 'Notice' means copyright, acknowledgement and trademark notices,
Source Location references, modification notices (subsection
3.3(b)) and all notices that refer to this Licence and to the
disclaimer of warranties that are included in the Covered
Source.
1.11 'Licensee' or 'You' means any person exercising rights under
this Licence.
1.12 'Licensor' means a natural or legal person who creates or
modifies Covered Source. A person may be a Licensee and a
Licensor at the same time.
1.13 'Convey' means to communicate to the public or distribute.
2 Applicability
2.1 This Licence governs the use, copying, modification, Conveying
of Covered Source and Products, and the Making of Products. By
exercising any right granted under this Licence, You irrevocably
accept these terms and conditions.
2.2 This Licence is granted by the Licensor directly to You, and
shall apply worldwide and without limitation in time.
2.3 You shall not attempt to restrict by contract or otherwise the
rights granted under this Licence to other Licensees.
2.4 This Licence is not intended to restrict fair use, fair dealing,
or any other similar right.
3 Copying, Modifying and Conveying Covered Source
3.1 You may copy and Convey verbatim copies of Covered Source, in
any medium, provided You retain all Notices.
3.2 You may modify Covered Source, other than Notices, provided that
You irrevocably undertake to make that modified Covered Source
available from a Source Location should You Convey a Product in
circumstances where the recipient does not otherwise receive a
copy of the modified Covered Source. In each case subsection 3.3
shall apply.
You may only delete Notices if they are no longer applicable to
the corresponding Covered Source as modified by You and You may
add additional Notices applicable to Your modifications.
Including Covered Source in a larger work is modifying the
Covered Source, and the larger work becomes modified Covered
Source.
3.3 You may Convey modified Covered Source (with the effect that You
shall also become a Licensor) provided that You:
a) retain Notices as required in subsection 3.2;
b) add a Notice to the modified Covered Source stating that You
have modified it, with the date and brief description of how
You have modified it;
c) add a Source Location Notice for the modified Covered Source
if You Convey in circumstances where the recipient does not
otherwise receive a copy of the modified Covered Source; and
d) license the modified Covered Source under the terms and
conditions of this Licence (or, as set out in subsection
8.3, a later version, if permitted by the licence of the
original Covered Source). Such modified Covered Source must
be licensed as a whole, but excluding Available Components
contained in it, which remain licensed under their own
applicable licences.
4 Making and Conveying Products
You may Make Products, and/or Convey them, provided that You either
provide each recipient with a copy of the Complete Source or ensure
that each recipient is notified of the Source Location of the Complete
Source. That Complete Source is Covered Source, and You must
accordingly satisfy Your obligations set out in subsection 3.3. If
specified in a Notice, the Product must visibly and securely display
the Source Location on it or its packaging or documentation in the
manner specified in that Notice.
5 Research and Development
You may Convey Covered Source, modified Covered Source or Products to
a legal entity carrying out development, testing or quality assurance
work on Your behalf provided that the work is performed on terms which
prevent the entity from both using the Source or Products for its own
internal purposes and Conveying the Source or Products or any
modifications to them to any person other than You. Any modifications
made by the entity shall be deemed to be made by You pursuant to
subsection 3.2.
6 DISCLAIMER AND LIABILITY
6.1 DISCLAIMER OF WARRANTY -- The Covered Source and any Products
are provided 'as is' and any express or implied warranties,
including, but not limited to, implied warranties of
merchantability, of satisfactory quality, non-infringement of
third party rights, and fitness for a particular purpose or use
are disclaimed in respect of any Source or Product to the
maximum extent permitted by law. The Licensor makes no
representation that any Source or Product does not or will not
infringe any patent, copyright, trade secret or other
proprietary right. The entire risk as to the use, quality, and
performance of any Source or Product shall be with You and not
the Licensor. This disclaimer of warranty is an essential part
of this Licence and a condition for the grant of any rights
granted under this Licence.
6.2 EXCLUSION AND LIMITATION OF LIABILITY -- The Licensor shall, to
the maximum extent permitted by law, have no liability for
direct, indirect, special, incidental, consequential, exemplary,
punitive or other damages of any character including, without
limitation, procurement of substitute goods or services, loss of
use, data or profits, or business interruption, however caused
and on any theory of contract, warranty, tort (including
negligence), product liability or otherwise, arising in any way
in relation to the Covered Source, modified Covered Source
and/or the Making or Conveyance of a Product, even if advised of
the possibility of such damages, and You shall hold the
Licensor(s) free and harmless from any liability, costs,
damages, fees and expenses, including claims by third parties,
in relation to such use.
7 Patents
7.1 Subject to the terms and conditions of this Licence, each
Licensor hereby grants to You a perpetual, worldwide,
non-exclusive, no-charge, royalty-free, irrevocable (except as
stated in subsections 7.2 and 8.4) patent licence to Make, have
Made, use, offer to sell, sell, import, and otherwise transfer
the Covered Source and Products, where such licence applies only
to those patent claims licensable by such Licensor that are
necessarily infringed by exercising rights under the Covered
Source as Conveyed by that Licensor.
7.2 If You institute patent litigation against any entity (including
a cross-claim or counterclaim in a lawsuit) alleging that the
Covered Source or a Product constitutes direct or contributory
patent infringement, or You seek any declaration that a patent
licensed to You under this Licence is invalid or unenforceable
then any rights granted to You under this Licence shall
terminate as of the date such process is initiated.
8 General
8.1 If any provisions of this Licence are or subsequently become
invalid or unenforceable for any reason, the remaining
provisions shall remain effective.
8.2 You shall not use any of the name (including acronyms and
abbreviations), image, or logo by which the Licensor or CERN is
known, except where needed to comply with section 3, or where
the use is otherwise allowed by law. Any such permitted use
shall be factual and shall not be made so as to suggest any kind
of endorsement or implication of involvement by the Licensor or
its personnel.
8.3 CERN may publish updated versions and variants of this Licence
which it considers to be in the spirit of this version, but may
differ in detail to address new problems or concerns. New
versions will be published with a unique version number and a
variant identifier specifying the variant. If the Licensor has
specified that a given variant applies to the Covered Source
without specifying a version, You may treat that Covered Source
as being released under any version of the CERN-OHL with that
variant. If no variant is specified, the Covered Source shall be
treated as being released under CERN-OHL-S. The Licensor may
also specify that the Covered Source is subject to a specific
version of the CERN-OHL or any later version in which case You
may apply this or any later version of CERN-OHL with the same
variant identifier published by CERN.
8.4 This Licence shall terminate with immediate effect if You fail
to comply with any of its terms and conditions.
8.5 However, if You cease all breaches of this Licence, then Your
Licence from any Licensor is reinstated unless such Licensor has
terminated this Licence by giving You, while You remain in
breach, a notice specifying the breach and requiring You to cure
it within 30 days, and You have failed to come into compliance
in all material respects by the end of the 30 day period. Should
You repeat the breach after receipt of a cure notice and
subsequent reinstatement, this Licence will terminate
immediately and permanently. Section 6 shall continue to apply
after any termination.
8.6 This Licence shall not be enforceable except by a Licensor
acting as such, and third party beneficiary rights are
specifically excluded.

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![Header Image](docs/images/Unb-banner.jpg)
# UNBProbeBase
<div align="center">
<img src="docs/images/UNBProbeBase-Side-30.png" width="350" height="350">
</div>
UNBProbeBase is magnetic base to connect up to 12 UNBProbes. The base has been developed to keep probes free from movement during probing sessions. It has 12 SMA connectors, 12 Headers and a prototyping area with pads for salvaged 0603-sized surface-mount components. Full documentation is currently under development.

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{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 2.2,
"height": 3.5,
"width": 3.5
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.19999999999999998
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "ignore",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "ignore",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.09999999999999999,
"min_copper_edge_clearance": 0.19999999999999998,
"min_hole_clearance": 0.19999999999999998,
"min_hole_to_hole": 0.19999999999999998,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.15,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.19999999999999998,
"min_via_diameter": 0.25,
"use_height_for_length_calcs": true
},
"track_widths": [
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],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
},
{
"diameter": 0.8,
"drill": 0.4
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
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},
"pin_map": [
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[
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]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "UNBProbeBase.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "probebase.net",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 0.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "Pcbnew",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"30fbe78d-17a9-4a60-8c9a-534e361ccfd1",
""
]
],
"text_variables": {}
}

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3
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(fp_lib_table
(lib (name "UNBProbeBase")(type "KiCad")(uri "${KIPRJMOD}/lib/UNBProbeBase.pretty")(options "")(descr ""))
)

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cad/UNBProbeBase/lib/UNBProbeBase.pretty/ANHW.kicad_mod Normal file
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(footprint "ANHW" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 0)
(attr through_hole)
(fp_text reference "REF**" (at 0 0) (layer "F.SilkS") hide
(effects (font (size 1.27 1.27) (thickness 0.15)))
(tstamp 72726069-402c-4b71-8d96-9122c63b0038)
)
(fp_text value "Val**" (at 0 0) (layer "F.SilkS") hide
(effects (font (size 1.27 1.27) (thickness 0.15)))
(tstamp 9371976a-7a7a-4533-9dbe-b06cc6cabdf2)
)
(fp_poly (pts
(xy 3.556 -2.934284)
(xy 3.556204 -2.624313)
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cad/UNBProbeBase/lib/UNBProbeBase.pretty/MountingHole_2.2mm_M2_ISO7380_Pad.kicad_mod Normal file
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cad/UNBProbeBase/lib/UNBProbeBase.pretty/PGrid_0603.kicad_mod Normal file
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(pad "" smd rect locked (at 3.17 9.59) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp ddf99b4f-df9f-4551-94d4-3e9bd2b56c35))
(pad "" smd rect locked (at -3.23 -1.61) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp de39b500-ba82-4091-bbe1-c973370be2fd))
(pad "" smd rect locked (at -0.03 -3.21) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp dfc15b0c-e129-4225-836a-ea4102717973))
(pad "" smd rect locked (at 1.57 -4.81) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp e5560f34-68a9-4c9e-9f4c-3c6419f84689))
(pad "" smd rect locked (at 1.57 15.99) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp e68aaa6a-4bbc-4592-b46b-1e5cb52651dd))
(pad "" smd rect locked (at 11.17 11.19) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp e79c8792-199a-4d94-9670-c6001fe9726f))
(pad "" smd rect locked (at -1.63 7.99) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp ecb039c8-5f1b-4785-b077-cd442ad9dd57))
(pad "" smd rect locked (at 12.77 -1.61) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp ed3717b7-a3bb-47bc-b90a-d214bd9a3f78))
(pad "" smd rect locked (at 1.57 -3.21) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp ee0f3416-30de-413b-ab4f-2b0b7a1eef02))
(pad "" smd rect locked (at 11.17 15.99) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp ef455240-7130-4726-8a8a-0086021c77a7))
(pad "" smd rect locked (at -6.43 12.79) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp f02a6bae-5a35-4040-8353-f9a916e5d772))
(pad "" smd rect locked (at 6.37 9.59) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp f074cc8c-cc85-4dd8-9059-fe257f73e66b))
(pad "" smd rect locked (at -6.43 -6.41) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp f4a1d0e5-78bc-4770-a3da-e0332581c3a2))
(pad "" smd rect locked (at -3.23 4.79) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp f4c65687-096f-48be-9965-86d800bb8f38))
(pad "" smd rect locked (at 4.77 -0.01) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp f50f5088-d187-4392-9d06-b85144d0d2c2))
(pad "" smd rect locked (at 12.77 1.59) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp f74db5a0-d15f-467b-a428-57d3e76ff778))
(pad "" smd rect locked (at -1.63 -1.61) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp f7d9e866-5a46-4e94-b508-b4d14a6c968e))
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(pad "" smd rect locked (at -3.23 -3.21) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp fbe7b2e9-4915-4cd7-a5b4-97a7e89c828e))
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(pad "" smd rect locked (at -4.83 11.19) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp fe53c839-3574-4bb0-8434-0e0ea491a2b3))
(pad "" smd rect locked (at 6.37 4.79) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp ff4bf005-f17a-4872-8b49-1f71bc95efaf))
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(pad "3" smd rect locked (at -8.03 6.39) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp f18b819f-92af-4eb2-8f3c-b846ae315d49))
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(pad "10" smd rect locked (at -8.03 -4.81) (size 0.95 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp d2cff3de-faf0-4702-a502-fb9b87b7ab8d))
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(pad "13" smd rect locked (at 2.37 -9.61) (size 21.75 0.95) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 1166aab3-5a31-4a2c-a873-b76744117f09))
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)

39
cad/UNBProbeBase/lib/UNBProbeBase.pretty/PinHeader_1x01_P2.54mm_Vertical_SilkAlter.kicad_mod Normal file
View File

@@ -0,0 +1,39 @@
(footprint "PinHeader_1x01_P2.54mm_Vertical_SilkAlter" (version 20211014) (generator pcbnew)
locked (layer "F.Cu")
(tedit 609F7651)
(descr "Through hole straight pin header, 1x01, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x01 2.54mm single row")
(attr through_hole)
(fp_text reference "REF**" (at 0 -2.33) (layer "F.SilkS") hide
(effects (font (size 1 1) (thickness 0.15)))
(tstamp d9a76eb7-53c8-4881-9e9e-bafb83b84c81)
)
(fp_text value "PinHeader_1x01_P2.54mm_Vertical_SilkAlter" (at 0 2.33) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp b771fb66-f1f1-4c2a-a8ce-4548f8644210)
)
(fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp babdc19d-650f-44db-839b-fc9b26091cc8)
)
(fp_line (start -1.33 1.31) (end -1.33 -1.33) (layer "F.SilkS") (width 0.12) (tstamp 47429d92-6cdd-47bd-92f9-38748d372703))
(fp_line (start 1.33 -1.33) (end 1.33 1.31) (layer "F.SilkS") (width 0.12) (tstamp 4891c9e2-49f9-43eb-9081-14ab045a4fd1))
(fp_line (start -1.33 -1.33) (end 1.33 -1.33) (layer "F.SilkS") (width 0.12) (tstamp 8d9d9155-f082-4462-8803-ec255a04cbdc))
(fp_line (start 1.33 1.31) (end -1.33 1.31) (layer "F.SilkS") (width 0.12) (tstamp aab7f528-3165-4da9-b5f9-443b631ec8ce))
(fp_line (start -1.8 -1.8) (end -1.8 1.8) (layer "F.CrtYd") (width 0.05) (tstamp 2aba7061-249c-4994-98f2-dc0bbecf125b))
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer "F.CrtYd") (width 0.05) (tstamp 6c859158-1d42-4163-9d71-aa0bf33c16c6))
(fp_line (start -1.8 1.8) (end 1.8 1.8) (layer "F.CrtYd") (width 0.05) (tstamp 74a4ae30-4bd3-47af-992d-daab0d9bf2ea))
(fp_line (start 1.8 1.8) (end 1.8 -1.8) (layer "F.CrtYd") (width 0.05) (tstamp fb76070e-e799-46bc-9274-737f33052172))
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer "F.Fab") (width 0.1) (tstamp 2d004d4b-e8df-4d94-bbe0-b25f97326031))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer "F.Fab") (width 0.1) (tstamp 5d2fb743-7a32-4277-a23a-910e06a720e8))
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer "F.Fab") (width 0.1) (tstamp a3c63c26-ae2e-4e85-afb5-78829ad505a9))
(fp_line (start -1.27 1.27) (end -1.27 -0.635) (layer "F.Fab") (width 0.1) (tstamp a6c6b594-cf3c-4a5f-8bb5-ae67b5fea4ed))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer "F.Fab") (width 0.1) (tstamp ab0f969d-9080-4508-a70b-293d852551ee))
(pad "17" thru_hole rect locked (at 0 -0.000164) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(zone_connect 2) (tstamp cc7d2b79-c988-4ea7-8fd2-7ccfc4116839))
(model "${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x01_P2.54mm_Vertical.wrl"
(offset (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

49
cad/UNBProbeBase/lib/UNBProbeBase.pretty/PinHeader_1x12_P2.54mm_Vertical_AlteredSilk.kicad_mod Normal file
View File

@@ -0,0 +1,49 @@
(footprint "PinHeader_1x12_P2.54mm_Vertical_AlteredSilk" (version 20211014) (generator pcbnew)
locked (layer "F.Cu")
(tedit 609F7162)
(descr "Through hole straight pin header, 1x12, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x12 2.54mm single row")
(attr through_hole)
(fp_text reference "REF**" (at 3.433 0.003 -180) (layer "F.SilkS") hide
(effects (font (size 1 1) (thickness 0.15)))
(tstamp ef667ece-1f0c-452e-bcec-e837a29274a5)
)
(fp_text value "Conn_01x12" (at -4.425 0.915 90) (layer "F.Fab") hide
(effects (font (size 1 1) (thickness 0.15)))
(tstamp a3fbbb32-7916-4a55-841f-36c3acc16d86)
)
(fp_text user "${REFERENCE}" (at 0 13.97 -90) (layer "F.Fab") hide
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 334ef330-8856-4296-94a3-f6aa921877ac)
)
(fp_line (start -1.33 -1.33) (end -1.33 29.27) (layer "F.SilkS") (width 0.12) (tstamp 0073cd7d-67b2-4b8e-95b2-e363918496bb))
(fp_line (start 1.33 -1.33) (end 1.33 29.27) (layer "F.SilkS") (width 0.12) (tstamp 780a8bdb-d3f2-4ccb-ad9d-6abfe5aa6a04))
(fp_line (start -1.33 29.27) (end 1.33 29.27) (layer "F.SilkS") (width 0.12) (tstamp 9375ab3f-0eac-40e1-8b80-ea1d54cfb7de))
(fp_line (start -1.33 -1.33) (end 1.33 -1.33) (layer "F.SilkS") (width 0.12) (tstamp dfa5674e-6fb9-4aea-b6b9-fe87312bf31a))
(fp_line (start 1.8 29.75) (end 1.8 -1.8) (layer "F.CrtYd") (width 0.05) (tstamp 37e437e9-21b3-4fda-adf3-974141205146))
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer "F.CrtYd") (width 0.05) (tstamp 93294809-3473-44c1-96c6-f6f680ca3e6d))
(fp_line (start -1.8 -1.8) (end -1.8 29.75) (layer "F.CrtYd") (width 0.05) (tstamp b615ea4c-4a7c-47f9-9e24-078b5f8fc285))
(fp_line (start -1.8 29.75) (end 1.8 29.75) (layer "F.CrtYd") (width 0.05) (tstamp ba31bf85-25d0-4187-9e3c-7f27d066da7c))
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer "F.Fab") (width 0.1) (tstamp 07e4a594-198c-472c-951b-31964d592c37))
(fp_line (start 1.27 -1.27) (end 1.27 29.21) (layer "F.Fab") (width 0.1) (tstamp 0bf290dd-2ef7-4404-ba2c-be18aecf6c80))
(fp_line (start -1.27 29.21) (end -1.27 -0.635) (layer "F.Fab") (width 0.1) (tstamp 33dcd407-a68b-4b6a-8cb5-84bac1705ec3))
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer "F.Fab") (width 0.1) (tstamp 957eb1e6-fbf7-4735-90d5-52e84096e3ca))
(fp_line (start 1.27 29.21) (end -1.27 29.21) (layer "F.Fab") (width 0.1) (tstamp 9a2013ad-47c0-4be8-8352-d8a7c3f743fb))
(pad "1" thru_hole circle locked (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp 07fb19ce-037f-42cd-ac8f-fb60b6189d32))
(pad "2" thru_hole oval locked (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp d651fe81-b03a-4ed5-bed5-e3b68af83cb6))
(pad "3" thru_hole oval locked (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp 3fd5b823-2a77-4012-a651-3c786de94282))
(pad "4" thru_hole oval locked (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp 68c84021-827d-4bc8-8599-14168d974692))
(pad "5" thru_hole oval locked (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp 40532640-b8b4-46f2-8284-f1040993bbb2))
(pad "6" thru_hole oval locked (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp f16e0064-1951-4925-b2e3-592d1404d892))
(pad "7" thru_hole oval locked (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp f5df6ede-638c-4cd4-b02d-b741f8f56d32))
(pad "8" thru_hole oval locked (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp 88546f85-0a77-407d-9262-9012d85a4200))
(pad "9" thru_hole oval locked (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp ec257a5d-6a92-41c6-a331-8903420f996a))
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cad/UNBProbeBase/lib/UNBProbeBase.pretty/SMA_Amphenol_901-144_Vertical.kicad_mod Normal file
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cad/UNBProbeBase/lib/UNBProbeBase.pretty/logo.kicad_mod Normal file
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M48
; DRILL file {KiCad 6.0.11+dfsg-1} date zo 09 nov 2025 18:03:17 CET
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M30

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M48
; DRILL file {KiCad 6.0.11+dfsg-1} date zo 09 nov 2025 18:03:17 CET
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; #@! TA.AperFunction,Plated,PTH,ComponentDrill
T4C0.0669
; #@! TA.AperFunction,Plated,PTH,ComponentDrill
T5C0.0866
%
G90
G05
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T5
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T0
M30

170
fab/gerbers/UNBProbeBase-job.gbrjob Normal file
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{
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"Material": "FR4",
"Name": "F.Cu/In1.Cu",
"Notes": "Type: dielectric layer 1 (from F.Cu to In1.Cu)"
},
{
"Type": "Copper",
"Thickness": 0.035,
"Name": "In1.Cu"
},
{
"Type": "Dielectric",
"Thickness": 0.48,
"Material": "FR4",
"Name": "In1.Cu/In2.Cu",
"Notes": "Type: dielectric layer 2 (from In1.Cu to In2.Cu)"
},
{
"Type": "Copper",
"Thickness": 0.035,
"Name": "In2.Cu"
},
{
"Type": "Dielectric",
"Thickness": 0.48,
"Material": "FR4",
"Name": "In2.Cu/B.Cu",
"Notes": "Type: dielectric layer 3 (from In2.Cu to B.Cu)"
},
{
"Type": "Copper",
"Thickness": 0.035,
"Name": "B.Cu"
},
{
"Type": "SolderMask",
"Thickness": 0.01,
"Name": "Bottom Solder Mask"
},
{
"Type": "SolderPaste",
"Name": "Bottom Solder Paste"
},
{
"Type": "Legend",
"Name": "Bottom Silk Screen"
}
]
}

BIN
releases/v0.2/UNBProbeBase_v02.zip Normal file
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